Broadband integrated services digital networks (B-ISDN) are digital packet networks which may be based upon the asynchronous transfer mode (ATM) protocol being standardized by the CCITT. In ATM, data is transported at 155 Mb/sec, or multiples of 155 Mb/sec, in fixed size cells comprising 53 bytes. Each ATM cell comprises 48 bytes of data to which a 5 byte header is appended. The header of an ATM cell comprises a group of identifiers including a virtual path identifier (VPI) and a virtual channel identifier (VCI) which uniquely specify the call or connection (virtual circuit) to which the cell belongs. When an ATM cell arrives at an input to a switch in an ATM network, its header, containing a VPI and a VCI representing the virtual path and virtual channel to which the cell belongs on an input link to the switch, is examined to determine where the cell is to be routed. The header is also changed so that it contains a new VPI and VCI indicating the virtual path and the virtual channel to which the cell will belong on an output link from the switch.
Existing integrated circuit chips which do this processing are usually called header translation units and perform the following two operations, header modification and manipulation of local routing tags. Header translation units modify one or both of the virtual path identifier and the virtual channel identifier (VPI/VCI) in the ATM header. Prior header translation units typically do a table look up to accomplish this. Specifically, those units include a random access memory containing a new header to be attached to each ATM cell. A predetermined portion of the old header of an ATM cell is used to address the random access memory at the location of the new header for the ATM cell. In addition to providing a new header for each ATM cell, header translation units also may attach a routing tag to each ATM cell to cause an ATM switch to route the cell to an appropriate switch output and output link. The first operation is required by B-ISDN standards to route ATM cells through different virtual paths on different links. The second operation is internal to ATM switches and depends on the type of switch used. These two operations are the minimum operations required for transporting ATM cells through a network. Other operations, however, would be useful in ATM interfaces. Those other operations include inserting cells into and extracting cells from ATM links between ATM switches, policing bandwidth usage of communications channels between ATM switches and communications channels between users and the network, and gathering statistics to evaluate network performance. In the past, these functions, if they were performed at all, had to be performed by separate chips in addition to the header translation unit. Multiple table look ups in random access memories in addition to the table look up in the random access memory of the header translation unit are required. This multiplicity of chips and table look ups results in space consuming and complex circuitry and long time delays in accomplishing the functions described above. In addition, prior circuitry was inflexible in that not all of the ATM header could be used to perform table look up operations. That prior circuitry also did not have convenient facilities for selectively removing ATM cells from a cell stream flowing through an ATM switch or for selectively adding ATM cells to that cell stream. Prior circuitry thus did not lend itself naturally to distributed switch control. It required a central controller which limited cell processing speed.